R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 740

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 703 of 802
33.4.4
Note:
1. To set this bit to 1, first write 0 and then 1 immediately. Do not generate an interrupt between writing 0 and
2. To set the FMR21 bit to 0 (erase restart), set it when the FMR01 bit in the FMR0 register is set to 1 (CPU rewrite
FMR20 Bit (Erase-Suspend Enable Bit)
FMR21 Bit (Erase-Suspend Request Bit)
FMR22 Bit (Interrupt Request Suspend-Request Enable Bit)
FMR27 Bit (Low-Power-Current Read Mode Enable Bit)
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 01B6h
[Condition for setting to 0]
Set to 0 by a program.
[Conditions for setting to 1]
writing 1.
mode enabled).
When the FMR20 bit is set to 1 (enabled), the erase-suspend function is enabled.
When the FMR21 bit is set to 1, erase-suspend mode is entered. If the FMR22 bit is set to 1 (erase-suspend
request enabled by interrupt request), the FMR21 bit is automatically set to 1 (erase-suspend request) when an
interrupt request for the enabled interrupt is generated, and erase-suspend mode is entered. To restart auto-
erasure, set the FMR21 bit to 0 (erase restart).
•
•
When the FMR 22 bit is set to 1 (erase-suspend request enabled by interrupt request), the FMR21 bit is
automatically set to 1 (erase-suspend request) at the time an interrupt request is generated during auto-erasure.
Set the FMR22 bit to 1 when using erase-suspend while rewriting the user ROM area in EW1 mode.
When the FMR 27 bit is set to 1 (low-consumption-current read mode enabled) in low-speed clock mode (XIN
clock stopped) or low-speed on-chip oscillator mode (XIN clock stopped), power consumption when reading
the flash memory can be reduced. Refer to 9.7.10 Low-Current-Consumption Read Mode for details.
Symbol
The FMR22 bit is set to 1 (erase-suspend request enabled by interrupt request) when an interrupt is generated.
Set to 1 by a program.
Symbol
FMR20 Erase-suspend enable bit
FMR21 Erase-suspend request bit
FMR22 Interrupt request suspend
FMR27 Low-consumption-current
Bit
Flash Memory Control Register 2 (FMR2)
—
—
—
—
FMR27
b7
0
request enable bit
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Reserved bits
read mode enable bit
b6
—
0
Oct 30, 2009
Bit Name
(1)
b5
—
0
(1)
(1)
(2)
b4
—
0
0: Erase-suspend disabled
1: Erase-suspend enabled
0: Erase restart
1: Erase-suspend request
0: Erase-suspend request disabled by interrupt request
1: Erase-suspend request enabled by interrupt request
Set to 0.
0: Low-consumption-current read mode disabled
0: Low-consumption-current read mode enabled
b3
—
0
FMR22
b2
0
Function
FMR21
b1
0
FMR20
b0
0
33. Flash Memory
R/W
R/W
R/W
R/W
R/W
R/W
—