R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 172

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 135 of 802
Figure 9.2
Figure 9.2 shows the Time from Wait Mode to First Instruction Execution following Exit after CM30 Bit in
CM3 Register is Set to 1 (MCU Enters Wait Mode).
To use a peripheral function interrupt to exit wait mode, set up the following before setting the CM30 bit to 1.
(1) Set the I flag to 0 (maskable interrupt disabled)
(2) Set the interrupt priority level in bits ILVL2 to ILVL0 in the interrupt control registers of the peripheral
(3) Operate the peripheral function to be used for exiting wait mode.
When the MCU exits by a peripheral function interrupt, the time (number of cycles) between interrupt request
generation and interrupt routine execution is determined by the settings of the FMSTP bit in the FMR0 register
and the VCA20 bit in the VCA2 register, as shown in Figure 9.2.
The clock set by bits CM35, CM36, and CM37 in the CM3 register is used as the CPU clock when the MCU
exits wait mode by a peripheral function interrupt. At this time, the CM06 bit in the CM0 register and bits
CM16 and CM17 in the CM1 register automatically change.
function interrupts to be used for exiting wait mode. Set bits ILVL2 to ILVL0 of the peripheral function
interrupts that are not to be used for exiting wait mode to 000b (interrupt disabled).
FMR0 Register
(flash memory
(flash memory
FMSTP Bit
operates)
stops)
Time from Wait Mode to First Instruction Execution following Exit after CM30 Bit in
CM3 Register is Set to 1 (MCU Enters Wait Mode)
0
1
low consumption disabled)
low consumption enabled)
low consumption enabled)
low consumption disabled
VCA2 Register
(internal power
(internal power
(internal power
(internal power
VCA20 Bit
Wait mode
Interrupt request generation
Oct 30, 2009
0
1
0
1
stabilization time
Stabilization Time
Internal power
100 s (max.)
Internal Power
100 s (max.)
100 s (max.)
T0
0 s
0 s
(T0)
Period of system clock
Period of system clock
activation sequence
Activation (T1)
Flash memory
Flash Memory
1 cycle + 60 s
Time until
(max.)
1 cycle
T1
Period of CPU clock
restart sequence
Same as above
Supply (T2)
CPU Clock
CPU clock
Time until
2 cycles
T2
The total of T0 to
T2 is the time
from wait mode to
first instruction
execution
following exit.
Remarks
9. Power Control

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