R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 676

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 639 of 802
29.3.3.3
29.3.3.4
This trigger is selected when bits ADCAP1 to ADCAP0 in the ADMOD register are set to 10b (timer RC).
To use this function, make sure the following conditions are met:
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•
•
•
When the IMFj bit in the TRCSR register is changed from 0 to 1 under the above conditions, A/D conversion
starts.
Refer to 19. Timer RC, 19.5 Timer Mode (Output Compare Function), 19.6 PWM Mode, 19.7 PWM2
Mode for the details of timer RC and the output compare function (timer mode, PWM mode, and PWM2
mode).
This trigger is selected when bits ADCAP1 to ADCAP0 in the ADMOD register are set to 11b (external trigger
(ADTRG)).
To use this function, make sure the following conditions are met:
•
•
•
•
When the ADTRG pin input is changed from high to low under the above conditions, A/D conversion starts.
Bits ADCAP1 to ADCAP0 in the ADMOD register are set to 10b (timer RC).
Timer RC is used in the output compare function (timer mode, PWM mode, and PWM2 mode).
The ADTRGjE bit (j = A, B, C, D) in the TRCADCR register is set to 1 (A/D trigger occurs at compare match
with TRCGRj register).
The ADST bit in the ADCON0 register is set to 1 (A/D conversion starts).
Bits ADCAP1 to ADCAP0 in the ADMOD register are set to 11b (external trigger (ADTRG)).
The INT7EN bit in the INTEN register is set to 1 ((INT7 input enabled)).
The port direction register is set to input:
When the INT7SEL0 bit in the INTSR register is 0, the PD3_7 bit in the PD3 register is set to 0 (input mode).
When the INT7SEL0 bit in the INTSR register is 1, the PD11_7 bit in the PD11 register is set to 0 (input
mode)
The ADST bit in the ADCON0 register is set to 1 (A/D conversion starts).
Trigger from Timer RC
External Trigger
Oct 30, 2009
29. A/D Converter