R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 353

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 316 of 802
20.3
Figure 20.7
The input capture function measures the external signal width and period. The content of the TRDi register
(counter) is transferred to the TRDGRji register as a trigger of the TRDIOji (i = 0 or 1, j = either A, B, C, or D) pin
external signal (input capture). Since this function is enabled with a combination of the TRDIOji pin and TRDGRji
register, the input capture function, or any other mode or function, can be selected for each individual pin.
The TRDGRA0 register can also select the fOCO128 signal as input-capture trigger input.
Figure 20.7 shows a Block Diagram of Input Capture Function, Table 20.5 lists the Input Capture Function
Specifications. Figure 20.8 shows an Operating Example of Input Capture Function.
i = 0 or 1
Notes:
TRDIOAi
TRDIOCi
TRDIODi
TRDIOBi
Input Capture Function
1. When the BFCi bit in the TRDMR register is set to 1 (the TRDGRCi register is used as the buffer register of the
2. When the BFDi bit in the TRDMR register is set to 1 (the TRDGRDi register is used as the buffer register of the
3. The trigger input of the TRDGRA0 register can select the TRDIOA0 pin input or fOCO128 signal.
fOCO-S
TRDGRAi register).
TRDGRBi register).
(3)
Block Diagram of Input Capture Function
Only TRDGRA0 available
Divided
by 128
selection
selection
selection
selection
Edge
Edge
Edge
Edge
Oct 30, 2009
fOCO128
IOA3 = 0
IOA3 = 1
(Note 1)
(Note 2)
Input capture signal
Input capture signal
Input capture signal
Input capture signal
TRDGRAi
TRDGRCi
TRDGRBi
TRDGRDi
register
register
register
register
TRDi register
20. Timer RD