R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 694

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 657 of 802
31.2
31.2.1
31.2.2
Notes:
1. To set the INTiPL bit (i = 0 to 3) to 1 (both edges), set the POL bit in the INTiIC register to 0 (falling edge
2. The IR bit in the INTiIC register may be set to 1 (interrupt requested) if the INTiPL bit is rewritten. Refer to 12.8.4
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 01F8h
Address 01FAh
selected).
Changing Interrupt Sources .
Symbol INT3COUT
Symbol INT3PL
Registers
INT0EN INT0 input enable bit
INT1EN INT1 input enable bit
INT2EN INT2 input enable bit
INT3EN INT3 input enable bit
INT1COUT Comparator B1 monitor flag
INT3COUT Comparator B3 monitor flag
Symbol
INT0PL INT0 input polarity select bit
INT1PL INT1 input polarity select bit
INT2PL INT2 input polarity select bit
INT3PL INT3 input polarity select bit
Bit
Bit
INT1CP0
INT3CP0
Symbol
Comparator B Control Register 0 (INTCMP)
External Input Enable Register 0 (INTEN)
b7
b7
0
0
Comparator B1 operation enable bit 0: Comparator B1 operation disabled
Reserved bits
Comparator B3 operation enable bit 0: Comparator B3 operation disabled
Reserved bits
INT3EN
b6
0
b6
Oct 30, 2009
0
Bit Name
Bit Name
INT2PL
b5
0
b5
0
INT2EN
(1, 2)
(1, 2)
(1, 2)
(1, 2)
b4
0
INT3CP0 INT1COUT
b4
0
INT1PL
0: Disabled
1: Enabled
0: One edge
1: Both edges
0: Disabled
1: Enabled
0: One edge
1: Both edges
0: Disabled
1: Enabled
0: One edge
1: Both edges
0: Disabled
1: Enabled
0: One edge
1: Both edges
1: Comparator B1 operation enabled
Set to 0.
0: IVCMP1
1: IVCMP1
1: Comparator B3 operation enabled
Set to 0.
0: IVCMP3
1: IVCMP3
b3
0
or comparator B1 operation disabled
or comparator B3 operation disabled
b3
0
INT1EN
b2
0
IVREF1
IVREF1
IVREF3
IVREF3
b2
0
INT0PL
Function
Function
b1
0
INT0EN
b1
0
b0
0
INT1CP0
31. Comparator B
b0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R

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