R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 469

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 432 of 802
Figure 21.2
21.2.5
Note:
1. This bit is automatically modified while timer RE counts.
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
PM, H12_H24: Bits in TRECR1 register
The above applies when counting starts from a.m. 0 on Sunday.
TREHR Register
Content of PM bit
Content of TREWK register
TREHR Register
Content of PM bit
Content of TREWK register
Address 011Ch
Symbol TSTART H12_H24
Content of
Content of
H12_H24 Operating mode select bit
TRERST Timer RE reset bit
TSTART Timer RE count start bit
Symbol
TOENA TREO pin output enable bit
TCSTF Timer RE count status flag
Bit
Timer RE Control Register 1 (TRECR1) in Real-Time Clock Mode
INT
PM
—
Definition of Time Representation
H12_H24 bit = 1
H12_H24 bit = 0
H12_H24 bit = 1
H12_H24 bit = 0
b7
(24-hour mode)
(12-hour mode)
(24-hour mode)
(12-hour mode)
X
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Interrupt request timing bit
A.m./p.m. bit
b6
X
Oct 30, 2009
18
0
0
6
Bit Name
19
1
1
7
000 (Sunday)
PM
b5
X
20
1 (p.m.)
2
2
8
21
3
3
9
TRERST
22
10
b4
4
4
X
Date changes
0 (a.m.)
23
11
5
5
0: Count stopped
1: Counting
0: Clock output disabled
1: Clock output enabled
Set to 1 in real-time clock mode.
When setting this bit to 0 after setting it to 1,
the following will occur:
• Registers TRESEC, TREMIN, TREHR, TREWK,
• Bits TCSTF, INT, PM, H12_H24, and TSTART in
• The 8-bit counter is set to 00h and the 4-bit counter
When the H12_H24 bit is set to 0 (12-hour mode)
0: a.m.
1: p.m.
When the H12_H24 bit is set to 1 (24-hour mode), its
value is undefined.
0: 12-hour mode
1: 24-hour mode
0: Count stops
1: Count starts
and TRECR2 are set to 00h.
the TRECR1 register are set to 0.
is set to 0h.
6
6
0
0
INT
001 (Monday)
b3
X
0 (a.m.)
7
7
1
1
000 (Sunday)
8
8
2
2
TOENA
b2
0
9
9
3
3
10
10
Function
TCSTF
11
11
b1
X
Noon
12
0
13
1
b0
—
X
14
1 (p.m.)
2
15
3
16
4
21. Timer RE
(1)
17
5
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
R