R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 188

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 151 of 802
Figure 11.2
11.1.5
Table 11.1
Note:
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer,
Oscillation stop detection
Address break
(Reserved)
Reset
11.1.5.1
1. Do not use these interrupts. They are provided exclusively for use by development tools.
There are 4 bytes in each vector. Set the starting address of an interrupt routine in each interrupt vector. When
an interrupt request is acknowledged, the CPU branches to the address set in the corresponding interrupt vector.
Figure 11.2 shows an Interrupt Vector.
The fixed vector tables are allocated addresses 0FFDCh to 0FFFFh.
Table 11.1 lists the Fixed Vector Tables. The vector addresses (H) of fixed vectors are used by the ID code
check function. For details, refer to 33.3 Functions to Prevent Flash Memory from being Rewritten.
Interrupt Source
Interrupts and Interrupt Vectors
(1)
(1)
Interrupt Vector
Fixed Vector Tables
Fixed Vector Tables
Vector address (H)
Vector address (L)
Oct 30, 2009
0FFDCh to 0FFDFh
0FFE0h to 0FFE3h
0FFE4h to 0FFE7h
0FFE8h to 0FFEBh
0FFECh to 0FFEFh
0FFF0h to 0FFF3h
0FFF4h to 0FFF7h
0FFF8h to 0FFFBh
0FFFCh to 0FFFFh
Address (L) to (H)
Vector Addresses
MSB
0 0 0 0
0 0 0 0
Middle-order address
Interrupt with
UND instruction
Interrupt with
INTO instruction
If the content of address
0FFE7h is FFh, program
execution starts from the
address shown by the
vector in the relocatable
vector table.
Low-order address
Remarks
High-order address
0 0 0 0
R8C/Tiny Series
Software Manual
11.6 Address Match Interrupt
14. Watchdog Timer,
8. Clock Generation Circuit
5. Resets
LSB
Reference
11. Interrupts