R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 492

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 455 of 802
22.3
Figure 22.2
22.3.1
Table 22.4
f1, f4, f8, f32
External signal input to
TRGCLKA or TRGCLKB pin
Table 22.4 lists the Count Source Selection, and Figure 22.2 shows the Count Source Block Diagram.
When phase counting mode is selected, the settings of bits TCK0 to TCK2 and bits CKEG0 and CKEG1 in the
TRGCR register are disabled.
The pulse width of an external clock input to the TRGCLKj pin (j =A or B) should be set to three cycles or more
of the timer RG operating clock. (See Table 22.1 Timer RG Operating Clocks.)
TRGCLKA
TRGCLKB
Common Items for Multiple Modes
Count Source
Count Sources
f32
f4
f8
f1
Count Source Selection
Count Source Block Diagram
TCK0 to TCK2: Bits in TRGCR register
Oct 30, 2009
The count source is selected by bits TCK0 to TCK2 in the TRGCR register.
• Bits TCK2 to TCK0 in the TRGCR register are set to 101b (TRGCLKA input) or
• The active edge is selected by bits CKEG0 and CKEG1 in the TRGCR register.
• The corresponding bit in the direction register is set to 0 (input mode).
111b (TRGCLKB input).
= 011b
= 100b
= 010b
= 101b
TCK2 to TCK0
= 111b
= 000b
Selection Method
Count source
TRG register
22. Timer RG

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