R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 732

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 695 of 802
33.3.2
33.3.3
Notes:
1. The OFS register is allocated in the flash memory, not in the SFRs. Set appropriate values as ROM data by a
Bit
b0
b1
b2
b3
b4
b5
b6
b7
The ROM protect function prevents the contents of the flash memory from being read, rewritten, or erased
using the OFS register in parallel I/O mode.
Refer to 13. Option Function Select Area for details of the OFS register.
The ROM code protect function is enabled by writing 1 to the ROMCR bit and writing 0 to the ROMCP1 bit.
This prevents the content of the on-chip flash memory from being read or rewritten.
Once ROM code protection is enabled, the content of the internal flash memory cannot be rewritten in parallel
I/O mode. To disable ROM code protection, erase the block including the OFS register using CPU rewrite
mode or standard serial I/O mode.
program.
Do not write additions to the OFS register. If the block including the OFS register is erased, the OFS register is
set to FFh.
When blank products are shipped, the OFS register is set to FFh. It is set to the written value after written by the
user.
When factory-programming products are shipped, the value of the OFS register is the value programmed by the
user.
For a setting example of the OFS register, refer to 13.3.1 Setting Example of Option Function Select Area.
After Reset
CSPROINI Count source protection mode
ROMCP1 ROM code protect bit
Address 0FFFFh
WDTON Watchdog timer start select bit
ROMCR ROM code protect disable bit
Symbol
Symbol CSPROINI
ROM Code Protect Function
Option Function Select Register (OFS)
—
—
—
—
Bit
Reserved bit
Reserved bits
after reset select bit
b7
Oct 30, 2009
b6
Bit Name
—
b5
—
User Setting Value
b4
—
0: Watchdog timer automatically starts after reset
1: Watchdog timer is stopped after reset
Set to 1.
0: ROM code protect disabled
1: ROMCP1 bit enabled
0: ROM code protect enabled
1: ROM code protect disabled
Set to 1.
0: Count source protection mode enabled after reset
1: Count source protection mode disabled after reset
ROMCP1 ROMCR
b3
(1)
b2
Function
b1
—
WDTON
b0
33. Flash Memory
R/W
R/W
R/W
R/W
R/W
R/W
R/W