R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 333

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 296 of 802
Figure 19.14
19.6.3
TRCSR register
TRCSR register
TRCSR register
TRCSR register
TRCIOD output
TRCIOB output
TRCIOC output
IMFC bit in
IMFD bit in
IMFA bit in
IMFB bit in
Operating Example
Count source
Operating Example in PWM Mode
The above applies under the following conditions:
• Bits BFC and BFD in the TRCMR register are set to 0 (registers TRCGRC and TRCGRD are not used as buffer registers).
• Bits EB, EC, and ED in the TRCOER register are set to 0 (TRCIOB, TRCIOC, and TRCIOD pin output enabled).
• Bits TOB and TOC in the TRCCR1 register are set to 0 (inactive level) and the TOD bit is set to 1 (active level).
• The POLB bit in the TRCCR2 register is set to 1 (high active), bits POLC and POLD are set to 0 (low active).
TRC register value
1
0
1
0
1
0
1
0
m
n
p
q
until compare match
Initial output “H”
utnil compare match
until compare match
Initial output “L”
Initial output “L”
Oct 30, 2009
Active level “H”
Active level “L”
Set to 0 by a program.
Set to 0 by a program.
q+1
Inactive level “H”
Inactive level “L”
p+1
n+1
m+1
m: Value set in TRCGRA register
n: Value set in TRCGRB register
p: Value set in TRCGRC register
q: Value set in TRCGRD register
m-q
Set to 0 by a program.
m-p
m-n
Set to 0 by a program.
19. Timer RC

Related parts for R5F2L3AAANFP#U1