R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 374

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 337 of 802
20.4.5
Note:
20.4.6
1. When selecting 0 (change the TRDGRji register output pin) by the IOj3 (j = C or D) bit in the TRDIORCi (i = 0 or
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0138h
Address 0139h
1) register, set the BFji bit in the TRDMR register to 0.
Symbol
Symbol
PWMC0 PWM mode of TRDIOC0 select bit
PWMD0 PWM mode of TRDIOD0 select bit
PWMC1 PWM mode of TRDIOC1 select bit
PWMD1 PWM mode of TRDIOD1 select bit
PWMB0 PWM mode of TRDIOB0 select bit
PWMB1 PWM mode of TRDIOB1 select bit
Symbol
Symbol
Bit
SYNC
Bit
BFC0
BFD0
BFC1
BFD1
Timer RD Mode Register (TRDMR) for Output Compare Function
Timer RD PWM Mode Register (TRDPMR) for Output Compare Function
—
—
—
—
—
BFD1
b7
b7
—
0
1
Timer RD synchronous bit
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
TRDGRC0 register function
select bit
TRDGRD0 register function
select bit
TRDGRC1 register function
select bit
TRDGRD1 register function
select bit
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
PWMD1 PWMC1 PWMB1
BFC1
b6
b6
(1)
(1)
(1)
(1)
0
0
Oct 30, 2009
Bit Name
Bit Name
BFD0
b5
b5
0
0
BFC0
b4
b4
0
0
0: Registers TRD0 and TRD1 operate independently
1: Registers TRD0 and TRD1 operate synchronously
0: General register
1: Buffer register of TRDGRA0 register
0: General register
1: Buffer register of TRDGRB0 register
0: General register
1: Buffer register of TRDGRA1 register
0: General register
1: Buffer register of TRDGRB1 register
Set to 0 (timer mode) for the output compare
function.
Set to 0 (timer mode) for the output compare
function.
b3
b3
—
—
1
1
PWMD0 PWMC0 PWMB0
b2
b2
—
1
0
Function
Function
b1
—
b1
1
0
SYNC
b0
b0
0
0
20. Timer RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—