R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 461

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 424 of 802
Figure 20.26
TRDGRB0 register
TRDGRA1 register
TRDGRB1 register
TRDSR0 register
TRDSR0 register
•
The TRD1 register counts 1, 0, FFFFh, 0, 1, in that order, when changing from decrement to increment
operation.
The UDF bit is set to 1 when changing between 1, 0, and FFFFh operation. Also, when bits CMD1 to CMD0
in the TRDFCR register are set to 10b (complementary PWM mode, buffer data transferred at underflow in
the TRD1 register), the content of the buffer registers (TRDGRD0, TRDGRC1, and TRDGRD1) is
transferred to the general registers (TRDGRB0, TRDGRA1, and TRDGRB1). During FFFFh, 0, 1 operation,
data are not transferred to registers such as the TRDGRB0 register. Also, at this time, the OVF bit remains
unchanged.
UDF bit in
OVF bit in
TRD0 register
count value
FFFFh
Operation when TRD1 Register Underflows in Complementary PWM Mode
Transfer from buffer register
1
0
1
0
1
0
Set to 0 by a program.
Oct 30, 2009
No change
No transfer from buffer register
When bits CMD1 to CMD0 in the
TRDFCR register are set to 10b
(transfer from the buffer register to the
general register when the TRD1 register
underflows).
20. Timer RD