R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 594

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 557 of 802
26.2.11 SS Mode Register 2 (SSMR2)
Notes:
1. Refer to 26.3.2.1 Association between Data I/O Pins and SS Shift Register for information on the
2. The SCS pin functions as a port, regardless of the values of bits CSS0 and CSS1 when the SSUMS bit is set to
3. This bit functions as the SCS input pin before starting transfer.
4. The BIDE bit is disabled when the SSUMS bit is set to 0 (clock synchronous communication mode).
5. When the SOOS bit is set to 0 (CMOS output), set the port direction register bits corresponding to pins SSI and
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 019Dh
combinations of data I/O pins.
0 (clock synchronous communication mode).
SSO to 0 (input mode).
Symbol
SSUMS SSU mode select bit
SCKOS SSCK pin open-drain output
Symbol
CSOS
SOOS
Bit
SCKS
CSS0
CSS1
BIDE
BIDE
b7
0
SCS pin open-drain output
select bit
Serial data open-drain output
select bit
select bit
SCS pin select bit
SSCK pin select bit
Bidirectional mode enable bit
SCKS
b6
(1)
0
Oct 30, 2009
Bit Name
CSS1
(2)
b5
0
(1)
CSS0
(1, 4)
b4
0
0: Clock synchronous communication mode
1: 4-wire bus communication mode
0: CMOS output
1: N-channel open-drain output
0: CMOS output
1: N-channel open-drain output
0: CMOS output
1: N-channel open-drain output
b5 b4
0: Function as a port
1: Function as the serial clock pin
0: Standard mode (communication using 2 pins of data
1: Bidirectional mode (communication using 1 pin of
0 0: Function as a port
0 1: Function as the SCS input pin
1 0: Function as the SCS output pin
1 1: Function as the SCS output pin
input and data output)
data input and data output)
SCKOS
b3
0
26. Synchronous Serial Communication Unit (SSU)
SOOS
b2
(5)
0
Function
CSOS
b1
0
SSUMS
(3)
(3)
b0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

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