R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 169

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 132 of 802
9.3.1
9.3.2
9.3.3
The XIN clock divided by 1 (no division), 2, 4, 8, or 16 is used as the CPU clock. When the CM14 bit is set to
0 (low-speed on-chip oscillator on), fOCO-S can be used for timer RA.
The XCIN clock divided by 1 (no division), 2, 4, 8, or 16 is used as the CPU clock.
In this mode, low consumption operation is enabled by stopping the XIN clock, and by setting the FMR27 bit in
the FMR2 register to 1 (flash memory low-consumption-current read mode enabled).
To enter wait mode from low-speed clock mode, lower consumption current in wait mode is enabled by setting
the VCA20 bit in the VCA2 register to 1 (internal power low consumption enabled).
To reduce the power consumption, refer to 9.7 Reducing Power Consumption.
When the CM14 bit in the CM1 register is set to 0 (low-speed on-chip oscillator on), the low-speed on-chip
oscillator is used as the on-chip oscillator clock. At this time, the on-chip oscillator clock divided by 1 (no
division), 2, 4, 8 or 16 is used as the CPU clock. The on-chip oscillator clock is also the clock source for the
peripheral function clocks.
In this mode, low consumption operation is enabled by stopping the XIN clock, and by setting the FMR27 bit in
the FMR2 register to 1 (flash memory low-consumption-current read mode enabled).
To enter wait mode from low-speed clock mode, current consumption in wait mode can be further reduced by
setting the VCA20 bit in the VCA2 register to 1 (internal power low consumption enabled).
To reduce the power consumption, refer to 9.7 Reducing Power Consumption.
High-Speed Clock Mode
Low-Speed Clock Mode
Low-Speed On-Chip Oscillator Mode
Oct 30, 2009
9. Power Control