R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 711

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 674 of 802
32.4
Table 32.4
Table 32.4 shows an outline of the LCD drive control procedure.
LSE0 to LSE7 register setting
LCD display data register initial value setting
LCD display control register initial value setting
LCR3 register setting
LCR2 register setting
LCR1 register setting
LCR0 register setting
Select segment output pins
Set the initial value for the data output from the SEG pins
Set the initial value for the SEG pin control
LCKS1 to LCKS0: Select the LCD clock source
LPSC2 to LPSC0: Select the division ratio
LDSPC: Enable LCD data display control
LDFR2 to LDFR0: Select the LCD data display control
LVUPE: Enable the voltage multiplier
LVURS: Select the reference voltage for the voltage
LVWT1 to LVWT0: Select the wait time for the voltage
LVLS3 to LVLS0: Select the VL1 internally-generated
LSTAT: Start LCD control
LDSPE: Enable LCD display
LBAS1 to LBAS0: Select the bias
LWAV: Select LCD waveform control
LDTY2 to LDTY0: Select the duty
LCD display data register setting
LCR2 register setting
Set the data output from the SEG pins
LDSPC: Enable LCD data display control
LDFR2 to LDFR0: Select the LCD data display control
LCD Drive Control
multiplier
LCD Drive Control Procedure and Status of Segment and Common Pins
multiplier
reference voltage
interval
interval
VL1 to VL4
Procedure
Oct 30, 2009
Reset
Voltage multiplier used
connected externally
Division resistor
• I/O port (input)
• High-impedance state
• High-impedance
At start of LCD control
• When the LDSPE bit is set to 0, the
• When the LDSPE bit is set to 1 and
• When the LDSPE bit is set to 1 and
Status of Segment and Common Pins
(Depending on the pull-up control
registers)
segment and common pins output a
low-level signal.
the LVUPE bit is set to 0, the
segment and common pins output
the content of the LCD display data
register.
the LVUPE bit is set to 1, the
segment and common pins output
the content of the LCD display data
register after the time specified by
bits LVWT0 and LVWT1 has
elapsed.
32. LCD Drive Control Circuit