R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 173

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 136 of 802
Figure 9.3
FMR0 Register
(flash memory
(flash memory
FMSTP Bit
operates)
stops)
Figure 9.3 shows the Time from Wait Mode to Interrupt Routine Execution after WAIT instruction is Executed.
To use a peripheral function interrupt to exit wait mode, set up the following before executing the WAIT
instruction.
(1) Set the interrupt priority level in bits ILVL2 to ILVL0 of the peripheral function interrupts to be used for
(2) Set the I flag to 1.
(3) Operate the peripheral function to be used for exiting stop mode.
When the MCU exits by a peripheral function interrupt, the time (number of cycles) between interrupt request
generation and interrupt routine execution is determined by the settings of the FMSTP bit in the FMR0 register
and the VCA20 bit in the VCA2 register, as shown in Figure 9.3.
The clock set by bits CM35, CM36, and CM37 in the CM3 register is used as the CPU clock when the MCU
exits wait mode by a peripheral function interrupt. At this time, the CM06 bit in the CM0 register and bits
CM16 and CM17 in the CM1 register automatically change.
0
1
exiting stop mode. Set bits ILVL2 to ILVL0 of the peripheral function interrupts that are not to be used for
exiting stop mode to 000b (interrupt disabled).
low consumption disabled)
low consumption enabled)
low consumption enabled)
low consumption disabled
Time from Wait Mode to Interrupt Routine Execution after WAIT instruction is
Executed
VCA2 Register
(internal power
(internal power
(internal power
(internal power
VCA20 Bit
Wait mode
Interrupt request generation
0
1
0
1
Oct 30, 2009
stabilization time
Stabilization Time
Internal power
100 s (max.)
Internal Power
100 s (max.)
100 s (max.)
T0
0 s
0 s
(T0)
Period of system clock
Period of system clock
activation sequence
Activation (T1)
Flash memory
Flash Memory
1 cycle + 60 s
Time until
(max.)
1 cycle
T1
Period of CPU clock
Same as above
restart sequence
Supply (T2)
CPU Clock
Time until
CPU clock
2 cycles
T2
Period of CPU clock
Interrupt sequence
Same as above
Sequence (T3)
Interrupt
Time for
20 cycles
T3
The total of T0 to T3 is
the time from wait mode
until an interrupt routine
is executed.
9. Power Control
Remarks