R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 561

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 524 of 802
Figure 24.9
24.4.2
24.4.3
(1) UFORM Bit in U2C0 Register = 0 (LSB first)
(2) UFORM Bit in U2C0 Register = 1 (MSB first)
The above applies under the following conditions:
If a communication error occurs while transmitting or receiving in UART mode, follow the procedures below:
• Resetting the U2RB register
(1) Set the RE bit in the U2C1 register to 0 (reception disabled).
(2) Set the RE bit in the U2C1 register to 1 (reception enabled).
• Resetting the U2TB register
(1) Set bits SMD2 to SMD0 in the U2MR register to 000b (serial interface disabled).
(2) Reset bits SMD2 to SMD0 in the U2MR register to 100b, 101b, and 110b.
(3) Write 1 to the TE bit in the U2C1 register (transmission enabled), regardless of the TE bit value of the
As shown in Figure 24.9, the UFORM bit in the U2C0 register can be used to select the transfer format. This
function is enabled when transfer data is 8 bits long. Figure 24.9 shows the Transfer Format.
CLK2
TXD2
RXD2
CLK2
TXD2
RXD2
• CKPOL bit in U2C0 register = 0
• U2LCH bit in U2C1 register = 0 (not inverted)
• STPS bit in U2MR register = 0 (one stop bit)
• PRYE bit in U2MR register = 1 (parity enabled)
U2C1 register.
(transmit data output at the falling edge and receive data input at the rising edge of the transfer clock)
Measure for Dealing with Communication Errors
LSB First/MSB First Select Function
Transfer Format
ST
ST
ST
ST
Oct 30, 2009
D0
D0
D7
D7
D1
D1
D6
D6
D2
D2
D5
D5
D3
D3
D4
D4
D4
D4
D3
D3
D5
D5
D2
D2
D6
D6
D1
D1
D7
D0
D7
D0
24. Serial Interface (UART2)
P
P
P
P
ST: Start bit
P: Parity bit
SP: Stop bit
SP
SP
SP
SP