R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 478

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 441 of 802
21.4
21.4.1
21.4.2
21.4.3
A reset input does not reset the timer RE data registers that store data of seconds, minutes, hours, and days of
the week. This requires the initial setting of all registers after power on.
Timer RE has the TSTART bit for instructing the count to start or stop, and the TCSTF bit, which indicates
count start or stop. Bits TSTART and TCSTF are in the TRECR1 register.
When the TSTART bit is set to 1 (count starts), timer RE starts counting and the TCSTF bit is set to 1 (count
starts). It takes up to two cycles of the count source until the TCSTF bit is set to 1 after setting the TSTART bit
to 1. During this time, do not access registers associated with timer RE
Similarly, when the TSTART bit is set to 0 (count stops), timer RE stops counting and the TCSTF bit is set to 0
(count stops). It takes the time for up to two cycles of the count source until the TCSTF bit is set to 0 after
setting the TSTART bit to 0. During this time, do not access registers associated with timer RE other than the
TCSTF bit.
Note:
Write to the following registers or bits while timer RE is stopped.
•
•
•
Timer RE is stopped while bits TSTART and TCSTF in the TRECR1 register are set to 0 (timer RE stopped).
Set all above-mentioned registers and bits (immediately before timer RE count starts) before setting the
TRECR2 register.
Figure 21.6 shows a Setting Example in Real-Time Clock Mode.
Registers TRESEC, TREMIN, TREHR, TREWK, and TRECR2
Bits H12_H24, PM, and INT in the TRECR1 register
Bits RCS0 to RCS3 in the TRECSR register
Notes on Timer RE
1. Registers associated with timer RE:
TRESEC, TREMIN, TREHR, TREWK, TRECR1, TRECR2, and TRECSR
Reset
Starting and Stopping Count
Register Setting
Oct 30, 2009
(1)
other than the TCSTF bit.
21. Timer RE