R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 445

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 408 of 802
20.8.7
20.8.8
Note:
1. Refer to 20.2.4 Pulse Output Forced Cutoff .
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 013Bh
Address 013Ch
Symbol
Symbol
Symbol
Symbol
Bit
Bit
EA0
EB0
EC0
ED0
EA1
EB1
EC1
ED1
PTO
Timer RD Output Master Enable Register 1 (TRDOER1) in PWM3 Mode
Timer RD Output Master Enable Register 2 (TRDOER2) in PWM3 Mode
—
—
—
—
—
—
—
ED1
PTO
b7
b7
1
0
TRDIOA0 output disable bit
TRDIOB0 output disable bit
TRDIOC0 output disable bit
TRDIOD0 output disable bit
TRDIOA1 output disable bit
TRDIOB1 output disable bit
TRDIOC1 output disable bit
TRDIOD1 output disable bit
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
INT0 of pulse output forced cutoff
signal input enabled bit
EC1
b6
b6
—
1
1
Oct 30, 2009
Bit Name
Bit Name
EB1
b5
b5
—
1
1
(1)
EA1
b4
b4
—
1
1
0: Output enabled
1: Output disabled (TRDIOA0 pin is used as a
0: Output enabled
1: Output disabled (TRDIOB0 pin is used as a
Set to 1 (programmable I/O port) in PWM3 mode.
0: Pulse output forced cutoff input disabled
1: Pulse output forced cutoff input enabled
ED0
b3
b3
—
programmable I/O port)
programmable I/O port)
(All bits in the TRDOER1 register are set to 1
(output disabled) when a low-level signal is
applied to the INT0 pin.)
1
1
EC0
b2
b2
—
1
1
Function
Function
EB0
b1
b1
—
1
1
EA0
b0
b0
—
1
1
20. Timer RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—