R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 438

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 401 of 802
20.7.18 Transfer Timing from Buffer Register
20.7.19 A/D Trigger Generation
• Transfer from the TRDGRD0, TRDGRC1, or TRDGRD1 register to the TRDGRB0, TRDGRA1, or
A compare match between registers TRD0 and TRDGRA0 and TRD1 underflow can be used as the conversion
start trigger of the A/D converter. The trigger is selected by bits ADEG and ADTRG in the TRDFCR register.
In addition, set bits ADCAP1 to ADCAP0 in the ADMOD register to 01b (start by timer RD).
TRDGRB1 register.
When bits CMD1 to CMD0 in the TRDFCR register are set to 10b, the content is transferred when the TRD1
register underflows.
When bits CMD1 to CMD0 are set to 11b, the content is transferred at compare match between registers
TRD0 and TRDGRA0.
Oct 30, 2009
20. Timer RD