R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 199

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 162 of 802
Figure 11.8
11.3.10 Interrupt Priority Level Selection Circuit
UART2 bus collision detection
The interrupt priority level selection circuit is used to select the highest priority interrupt.
Figure 11.8 shows the Interrupt Priority Level Selection Circuit.
Priority level of interrupts
UART1 reception
Timer RG
Timer RB
Timer RA
INT4
INT6
INT0
INT1
INT2
INT3
Interrupt Priority Level Selection Circuit
Level 0 (initial value)
Oct 30, 2009
Priority level of interrupts
Note:
Oscillation stop detection
1. Selectable by the IICSEL bit in the SSUIICSR register.
UART2 reception/ACK2
UART2 transmission/
UART1 transmission
UART0 transmission
Flash memory ready
UART0 reception
SSU / I
Watchdog timer
A/D conversion
Address match
Timer RD0
Timer RD1
Timer RC
Timer RE
Key input
NACK2
INT7
INT5
I flag
IPL
2
C bus
(1)
Highest
Lowest
Peripheral function interrupt priority
(if priority levels are same)
Interrupt request level
select output signal
Interrupt request
acknowledgement
11. Interrupts