R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 573

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 536 of 802
24.5.7
When a start condition is detected while the STAC bit is set to 1 (UART2 initialization enabled), the serial
interface operates as described below.
• The transmit shift register is initialized, and the contents of the U2TB register are transferred to the transmit
• The receive shift register is initialized, and the serial interface starts receiving data when the next clock pulse
• The SWC bit is set to 1 (SCL wait output enabled). Consequently, the SCL2 pin is pulled low at the falling
Note that when UART2 transmission/reception is started using this function, the TI bit does not change state.
Select the external clock as the transfer clock to start UART2 transmission/reception with this setting.
shift register. In this way, the serial interface starts sending data when the next clock pulse is applied.
However, the UART2 output value does not change state and remains the same as when a start condition was
detected until the first bit of data is output in synchronization with the input clock.
is applied.
edge of the 9th clock.
Initialization of Transmission/Reception
Oct 30, 2009
24. Serial Interface (UART2)

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