LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1019
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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NXP Semiconductors
Table 963. Pin description
<Document ID>
User manual
Symbol
P2_3
P2_4
P2_5
P2_6
P2_7
P2_8
P2_9
P2_10
[2]
[2]
[3]
[2]
[2]
[2]
[2]
[2]
J12
K11
K14
K16
H14
J16
H16
G16 I; PU
…continued
Reset
state
[1]
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
Type Description
-
I/O
O
I
-
I/O
I
I
-
I
I
I
-
I/O
I/O
O
I/O
O
I/O
I/O
-
O
I/O
I/O
I/O
O
I/O
I/O
I/O
O
O
I/O
All information provided in this document is subject to legal disclaimers.
n.c.
I2C1_SDA — I
pad).
U3_TXD — Transmitter output for USART3.
CTIN_1 — SCT input 1. Capture input 1 of timer 0. Capture input 1 of timer 2.
n.c.
I2C1_SCL — I
pad).
U3_RXD — Receiver input for USART3.
CTIN_0 — SCT input 0. Capture input 0 of timer 0, 1, 2, 3.
n.c.
CTIN_2 — SCT input 2. Capture input 2 of timer 0.
USB1_VBUS — Monitors the presence of USB1 bus power.
Note: This signal must be HIGH for USB reset to occur.
ADCTRIG1 — ADC trigger input 1.
n.c.
U0_DIR — RS-485/EIA-485 output enable/direction control for USART0.
EXTBUS_A10 — External memory address line 10.
USB0_IND0 — USB0 port indicator LED control output 0.
GPIO0[7] — General purpose digital input/output pin.
CTOUT_1 — SCT output 1. Match output 1 of timer 0.
U3_UCLK — Serial clock input/output for USART3 in synchronous mode.
EXTBUS_A9 — External memory address line 9. Boot control pin 3 (see
Table
n.c.
CTOUT_0 — SCT output 0. Match output 0 of timer 0.
U3_DIR — RS-485/EIA-485 output enable/direction control for USART3.
EXTBUS_A8 — External memory address line 8. Boot control pin 2 (see
Table
GPIO1[10] — General purpose digital input/output pin.
CTOUT_3 — SCT output 3. Match output 3 of timer 0.
U3_BAUD3 — <tbd>for USART3.
EXTBUS_A0 — External memory address line 0.
GPIO0[14] — General purpose digital input/output pin.
CTOUT_2 — SCT output 2. Match output 2 of timer 0.
U2_TXD — Transmitter output for USART2.
EXTBUS_A1 — External memory address line 1.
Rev. 00.13 — 20 July 2011
8). This pin must be HIGH on reset.
8).
2
2
C1 clock input/output (this pin does not use a specialized I2C
C1 data input/output (this pin does not use a specialized I2C
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
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