LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 358

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
20.6 Register description
<Document ID>
User manual
Table 299. Register access abbreviations
Table 300. Register overview: USB0 OTG controller (register base address 0x4000 6000)
Abbreviation
R/W
R/WC
R/WO
RO
WO
Name
-
Device/host capability registers
CAPLENGTH
HCSPARAMS
HCCPARAMS
DCIVERSION
DCCPARAMS
-
Device/host operational registers
USBCMD_D
USBCMD_H
USBSTS_D
USBSTS_H
USBINTR_D
USBINTR_H
FRINDEX_D
FRINDEX_H
-
DEVICEADDR
PERIODICLISTBASE
ENDPOINTLISTADDR R/W
ASYNCLISTADDR
TTCTRL
BURSTSIZE
TXFILLTUNING
-
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Access Address
-
RO
RO
RO
RO
RO
-
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
R/W
R/W
R/W
R/W
R/W
R/W
-
Chapter 20: LPC18xx USB0 Host/Device/OTG controller
0x140
0x144
0x144
offset
0x000 -
0x0FF
0x100
0x104
0x108
0x120
0x124
0x128 -
0x13C
0x140
0x148
0x148
0x14C
0x14C
0x150
0x154
0x154
0x158
0x158
0x15C
0x160
0x164
0x168 -
0x170
Capability register length
USB command (device mode)
USB command (host mode)
USB status (device mode)
USB status (host mode)
USB frame index (device mode)
Description
Reserved
Host controller structural parameters 0x0001 0011
Host controller capability parameters 0x0000 0006
Device interface version number
Device controller capability
parameters
Reserved
USB interrupt enable (device mode)
USB interrupt enable (host mode)
USB frame index (host mode)
Reserved
Frame list base address (host mode) 0x0000 0000
Address of endpoint list in memory
Address of endpoint list in memory
Asynchronous buffer status for
embedded TT (host mode)
Programmable burst size
Host transmit pre-buffer packet
tuning (host mode)
Reserved
USB device address (device mode)
Description
Read/Write
Read/Write one to Clear
Read/Write Once
Read Only
Write Only
UM10430
© NXP B.V. 2011. All rights reserved.
Reset value
0x0100 0040
0x0000 0001
0x0000 0186
0x0008 0000
0x0008 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
-
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