LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 296

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LPC1837FET256,551

Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1837FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293795551
18.1 How to read this chapter
18.2 Basic configuration
18.3 Features
18.4 General description
<Document ID>
User manual
The SD/MMC card interface is available on LPC18xx Rev ‘A’.
Table 222. SDIO clocking and power control
The SDIO is reset by the SD_RST (reset # 20).
The SD/MMC card interface supports the following modes:
<tbd>
SDIO register
interface
SDIO bit rate clock
UM10430
Chapter 18: LPC18xx SD/MMC interface
Rev. 00.13 — 20 July 2011
Secure Digital memory (SD version 3.0)
Secure Digital I/O (SDIO version 2.0)
Consumer Electronics Advanced Transport Architecture (CE-ATA version 1.1)
Multimedia Cards (MMC version 4.4)
All information provided in this document is subject to legal disclaimers.
Base clock
BASE_M3_CLK
BASE_SDIO_CLK
Rev. 00.13 — 20 July 2011
Branch clock
CLK_M3_SDIO
CLK_SDIO
© NXP B.V. 2011. All rights reserved.
Maximum
frequency
150 MHz
<tbd>
User manual
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