LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 306

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 236. Command Register (CMD, address 0x4000 402C) bit description
<Document ID>
User manual
Bit
5:0
6
7
8
9
10
11
12
13
Symbol
CMD_INDEX
RESPONSE_EXPECT
RESPONSE_ LENGTH
CHECK_RESPONSE_C
RC
DATA_EXPECTED
READ_WRITE
TRANSFER_MODE
SEND_AUTO_STOP
WAIT_PRVDATA_COM
PLETE
18.6.12 Command Register (CMD)
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
All information provided in this document is subject to legal disclaimers.
Description
Command index
response expect
No response expected from card
Response expected from card
response length
Short response expected from card
Long response expected from card
check response crc Some of command responses do not return valid
CRC bits. Software should disable CRC checks for those commands
in order to disable CRC checking by controller.
Do not check response CRC
Check response CRC
data expected
No data transfer expected (read/write)
Data transfer expected (read/write)
read/write. Don't care if no data expected from card.
Read from card
Data transfer expected (read/write)
transfer mode. Don't care if no data expected.
Block data transfer command
Stream data transfer command
send auto stop. When set, DWC_mobile_storage sends stop
command to SD_MMC_CEATA cards at end of data transfer. Refer to
<tbd> to determine:
- when send_auto_stop bit should be set, since some data transfers
do not need explicit stop commands
- open-ended transfers that software should explicitly send to stop
command
Additionally, when resume is sent to resume - suspended memory
access of SD-Combo card - bit should be set correctly if suspended
data transfer needs send_auto_stop. Don't care if no data expected
from card.
No stop command sent at end of data transfer
Send stop command at end of data transfer
wait prvdata complete. The wait_prvdata_complete = 0 option
typically used to query status of card during data transfer or to stop
current data transfer; card_number should be same as in previous
command.
Send command at once, even if previous data transfer has not
completed.
Wait for previous data transfer completion before sending command.
Rev. 00.13 — 20 July 2011
Chapter 18: LPC18xx SD/MMC interface
UM10430
© NXP B.V. 2011. All rights reserved.
306 of 1164
Reset
value
0
0
0
0
0
0
0
0
0