LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 208

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
13.4.4 ADC1 function select register
Table 114. ADC0 function select register (ENAIO0, address 0x4008 6C88) bit description
For pins which have digital and analog functions, this register selects the ADC1 function
over any of the possible digital functions.
In addition, each analog function is pinned out on a dedicated analog pin which is not
affected by this register.
The following pins are controlled by the ENAIO1 register:
Table 115. Pins controlled by the ENAIO1 register
By default, all pins are connected to their digital function 0 and the corresponding ENAIO1
register bit is set to one. In this case, only the digital pad is available.
Before selecting the analog pad by setting the ENAIO1 register bit to zero, the digital pad
must be set as follows using the corresponding SFSP register:
Table 116. ADC1 function select register (ENAIO1, address 0x4008 6C8C) bit description
Bit
6
31:7
Pin
PC_3
PC_0
PF_9
PF_6
PF_5
PF_11
P7_7
PF_7
Bit
0
1. Tri-state the output driver by selecting an input at the pinmux e.g. GPIO function in
2. Disable the receiver by setting the EZI bit to zero (see
3. Disable the pull-up resistor by setting the EPUN bit to one, and disable the pull-down
input mode.
the default setting.
resistor by setting the EPD bit to zero.
Symbol
ADC0_6
Symbol
ADC1_0
All information provided in this document is subject to legal disclaimers.
Value Description
0
1
Value Description
0
1
Rev. 00.13 — 20 July 2011
Select ADC0_6
Analog function ADC0_6 selected on pin PB_6.
Digital function selected on pin PB_6.
Reserved
Select ADC1_0
Analog function ADC1_0 selected on pin PC_3.
Digital function selected on pin PC_3.
ADC function
ADC1_0
ADC1_1
ADC1_2
ADC1_3
ADC1_4
ADC1_5
ADC1_6
ADC1_7
Chapter 13: LPC18xx System Control Unit (SCU)
Table 111
ENAIO1 register bit
0
1
2
3
4
5
6
7
or
UM10430
Table
© NXP B.V. 2011. All rights reserved.
Reset
value
0
-
Reset
value
0
112). This is
208 of 1164
Access
R/W
-
Access
R/W