LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1092

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LPC1837FET256,551

Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1837FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293795551
NXP Semiconductors
<Document ID>
User manual
42.10.6.2.3 CAN message interface command mask registers
Table 1025.CAN message interface command request registers (IF1_CMDREQ, address
[1]
The control bits of the IFx Command Mask Register specify the transfer direction and
select which of the IFx Message Buffer Registers are source or target of the data
transfer.The functions of the register bits depend on the transfer direction (read or write)
which is selected in the WR/RD bit (bit 7) of this Command mask register.
Select the WR/RD to
Transfer direction Write
Table 1026.CAN message interface command mask registers write direction (IF1_CMDMSK,
Bit
5:0
14:6
15
31:16
Bit
0
1
one for the Write transfer direction (write to message RAM)
zero for the Read transfer direction (read from message RAM)
When a message number that is not valid is written into the Command request registers, the message
number will be transformed into a valid value and that message object will be transferred.
Symbol
DATA_B
DATA_A
0x400E 2020 and IF2_CMDREQ, address 0x400E 2080) bit description
address 0x400E 2024 and IF2_CMDMSK, address 0x400E 2084) bit description
Symbol
Message Number Message number
-
BUSY
-
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Value Description
1
0
1
0
Description
0x01 to 0x20 = Valid message numbers
The message object in the message RAM is
selected for data transfer.
0x00 = Not a valid message number. This
value is interpreted as 0x20.
0x21 to 0x3F = Not a valid message number.
This value is interpreted as 0x01 - 0x1F.
Reserved
BUSY flag
Set to one by hardware when writing to this
Command request register.
Set to zero by hardware when read/write
action to this Command request register has
finished.
Reserved
Access data bytes 4-7
Transfer data bytes 4-7 to message object.
data bytes 4-7 unchanged.
Access data bytes 0-3
Transfer data bytes 0-3 to message object.
data bytes 0-3 unchanged.
[1]
[1]
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0x01
0
-
Reset
value
0
0
1092 of 1164
Access
R/W
R/W
Access
R/W
R
-

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