LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1100
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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42.10.6.3.2 CAN transmission request 2 register
42.10.6.3.3 CAN new data 1 register
42.10.6.3.4 CAN new data 2 register
This register contains the TXRQST bits of message objects 32 to 17. By reading out the
TXRQST bits, the CPU can check for which Message Object a Transmission Request is
pending. The TXRQST bit of a specific Message Object can be set/reset by the CPU via
the IFx Message Interface Registers or by the Message Handler after reception of a
Remote Frame or after a successful transmission.
Table 1038.CAN transmission request 2 register (TXREQ2, address 0x400E 2104) bit
This register contains the NEWDAT bits of message objects 16 to 1. By reading out the
NEWDAT bits, the CPU can check for which Message Object the data portion was
updated. The NEWDAT bit of a specific Message Object can be set/reset by the CPU via
the IFx Message Interface Registers or by the Message Handler after reception of a Data
Frame or after a successful transmission.
Table 1039.CAN new data 1 register (ND1, address 0x400E 2120) bit description
This register contains the NEWDAT bits of message objects 32 to 17. By reading out the
NEWDAT bits, the CPU can check for which Message Object the data portion was
updated. The NEWDAT bit of a specific Message Object can be set/reset by the CPU via
the IFx Message Interface Registers or by the Message Handler after reception of a Data
Frame or after a successful transmission.
Bit
15:0
31:16 -
Bit
15:0
31:16
Symbol
TXRQST32_17
Symbol
NEWDAT16_1
-
description
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Description
New data bits of message objects 16 to 1.
0 = No new data has been written into the data portion
of this Message Object by the Message Handler since
last time this flag was cleared by the CPU.
1 = The Message Handler or the CPU has written new
data into the data portion of this Message Object.
Reserved
Description
Transmission request bit of message objects 32 to 17.
0 = This message object is not waiting for
transmission.
1 = The transmission of this message object is
requested and not yet done.
Reserved
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
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value
0x00
-
Reset
value
0x00
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