LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 825
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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NXP Semiconductors
<Document ID>
User manual
36.6.2.4.1 CAN message interface command mask 1 registers
36.6.2.4 IF1 and IF2 message buffer registers
Table 767. CAN message interface command mask registers read direction (IF2_CMDMSK,
The bits of the Message Buffer registers mirror the Message Objects in the Message
RAM.
Table 768. CAN message interface command mask 1 registers (IF1_MSK1, address
Table 769. CAN message interface command mask 1 registers (IF2_MSK1, address
Bit
6
7
31:8
Bit
15:0
31:16
Bit
15:0
31:16
Symbol
MSK15_0
-
Symbol
MSK15_0
-
Symbol
MASK
WR_RD
-
address 0x400E 2084 (C_CAN0) and 0x400A 4024 (C_CAN1)) bit description
0x400E 2028 (C_CAN0) and 0x400A 4028 (C_CAN1)) bit description
0x400E 2088 (C_CAN0) and 0x400A 4028 (C_CAN1)) bit description
All information provided in this document is subject to legal disclaimers.
Description
Identifier mask
0 = The corresponding bit in the identifier of the message
can not inhibit the match in the acceptance filtering.
1 = The corresponding identifier bit is used for
acceptance filtering.
reserved
Description
Identifier mask
0 = The corresponding bit in the identifier of the message
can not inhibit the match in the acceptance filtering.
1 = The corresponding identifier bit is used for
acceptance filtering.
reserved
Rev. 00.13 — 20 July 2011
Value Description
0
1
0
-
Access mask bits
Mask bits unchanged.
Transfer Identifier MASK + MDIR + MXTD to
IFx message buffer register.
Read transfer
Transfer data from the message object
addressed by the command request register
to the selected message buffer registers
CANIFn_CMDREQ.
reserved
Chapter 36: LPC18xx C_CAN
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0xFFFF R/W
0
Reset
value
0xFFFF R/W
0
Reset
value
0
0
0
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Access
R/W
-
R/W
Access
-
Access
-
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