LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 509
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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NXP Semiconductors
22.7 Functional description
<Document ID>
User manual
22.6.28 DMA Current host receive descriptor register
22.6.29 DMA Current host transmit buffer address register
22.6.30 DMA Current host receive buffer address register
Table 432. DMA Current host transmit descriptor register (DMA_CURHOST_TRANS_DES,
The Current Host Receive Descriptor register points to the start address of the current
Receive Descriptor read by the DMA.
Table 433. DMA Current host receive descriptor register (DMA_CURHOST_REC_DES,
The Current Host Transmit Buffer Address register points to the current Transmit Buffer
Address being read by the DMA.
Table 434. DMA Current host transmit buffer address register
The Current Host Receive Buffer Address register points to the current Receive Buffer
address being read by the DMA.
Table 435. DMA Current host receive buffer address register (DMA_CURHOST_REC_BUF,
<tbd>
Bit
31:0
Bit
31:0
Bit
31:0
Bit
31:0
Symbol
HTD
Symbol
HRD
Symbol
HTB
Symbol
HRB
address 0x4001 1048) bit description
address 0x4001 104C) bit description
(DMA_CURHOST_TRANS_BUF, address 0x4001 1050) bit description
address 0x4001 1054) bit description
All information provided in this document is subject to legal disclaimers.
Description
Host Transmit Descriptor Address Pointer
Cleared on Reset. Pointer updated by DMA during
operation.
Description
Host Receive Descriptor Address Pointer
Cleared on Reset. Pointer updated by DMA during
operation.
Description
Host Transmit Buffer Address Pointer
Cleared on Reset. Pointer updated by DMA during
operation.
Description
Host Receive Buffer Address Pointer
Cleared on Reset. Pointer updated by DMA during
operation.
Rev. 00.13 — 20 July 2011
Chapter 22: LPC18xx Ethernet
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0
Reset
value
0
Reset
value
0
Reset
value
0
509 of 1164
Access
RO
Access
RO
Access
RO
Access
RO
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