LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 366
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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NXP Semiconductors
Table 307. USB Command register in host mode (USBCMD_H - address 0x4000 6140) bit description - host mode
<Document ID>
User manual
Bit
15
23:16
31:24
Symbol
FS2
ITC
-
20.6.4 USB Status register (USBSTS)
Value
Table 308. Frame list size values
This register indicates various states of the Host/Device controller and any pending
interrupts. Software sets a bit to zero in this register by writing a one to it.
Remark: This register does not indicate status resulting from a transaction on the serial
bus.
USBCMD bit 15
0
0
0
0
1
1
1
1
Description
Bit 2 of the Frame List Size bits. See
Interrupt threshold control.
The system software uses this field to set the maximum rate at which
the host/device controller will issue interrupts. ITC contains the
maximum interrupt interval measured in micro-frames. Valid values
are shown below. All other values are reserved.
0x0 = Immediate (no threshold)
0x1 = 1 micro frame.
0x2 = 2 micro frames.
0x8 = 8 micro frames.
0x10 = 16 micro frames.
0x20 = 32 micro frames.
0x40 = 64 micro frames.
Reserved
All information provided in this document is subject to legal disclaimers.
USBCMD bit 3
0
0
1
1
0
0
1
1
Rev. 00.13 — 20 July 2011
Chapter 20: LPC18xx USB0 Host/Device/OTG controller
USBCMD bit 2
0
1
0
1
0
1
0
1
Table
308.
Frame list size
1024 elements (4096 bytes) - default
value
512 elements (2048 bytes)
256 elements (1024 bytes)
128 elements (512 bytes)
64 elements (256 bytes)
32 elements (128 bytes)
16 elements (64 bytes)
8 elements (32 bytes)
UM10430
© NXP B.V. 2011. All rights reserved.
Access Reset
-
R/W
366 of 1164
value
0
0x8
0
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