LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 949

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 889. Interrupt Set-Pending Register 0 register (ISPR0 - address 0xE000 E200) bit description
Table 890. Interrupt Clear-Pending Register 0 register (ICPR0 - address 0xE000 E280) bit description
<Document ID>
User manual
Bit
29
30
31:
30
Bit
0
1
2
4:3
5
6
7
8
9
Symbol
ISP_AES
ISP_SPIFI
-
Symbol
ICP_DAC
ICP_ER
ICP_DMA
-
ICP_ETHERNET ETHERNET interrupt pending clear.
ICP_SDIO
ICP_LCD
ICP_USB0
ICP_USB1
42.1.8.4 Interrupt Clear-Pending Register 0 register
The ICPR0 register allows clearing the pending state of the peripheral interrupts, or for
reading the pending state of those interrupts. Setting the pending state of interrupts is
done through the ISPR0 register
Description
AES interrupt pending set.
Write: writing 0 has no effect, writing 1 changes the interrupt state to pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
SPIFI interrupt pending set.
Write: writing 0 has no effect, writing 1 changes the interrupt state to pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
Reserved
Description
DAC interrupt pending clear.
Write: writing 0 has no effect, writing 1 changes the interrupt state to not pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
Event router interrupt pending clear.
Write: writing 0 has no effect, writing 1 changes the interrupt state to not pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
DMA interrupt pending clear.
Write: writing 0 has no effect, writing 1 changes the interrupt state to not pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
Reserved.
Write: writing 0 has no effect, writing 1 changes the interrupt state to not pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
SDIO interrupt pending clear.
Write: writing 0 has no effect, writing 1 changes the interrupt state to not pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
LCD interrupt pending clear.
Write: writing 0 has no effect, writing 1 changes the interrupt state to not pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
USB0 interrupt pending clear.
Write: writing 0 has no effect, writing 1 changes the interrupt state to not pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
USB1interrupt pending clear.
Write: writing 0 has no effect, writing 1 changes the interrupt state to not pending.
Read: 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is pending.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
(Section
42.1.8.3).
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
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Reset
value
0
0
0
Reset
value
0
0
0
0
0
0
0
0
0