LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 612

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LPC1837FET256,551

Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1837FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293795551
NXP Semiconductors
<Document ID>
User manual
24.7.4 Output generation
24.7.5 Interrupt generation
Figure 67
The SCT generates one interrupt to the NVIC.
Fig 66. Event selection
Fig 67. Output slice i
Fig 68. SCT interrupt generation
Events
shows one output slice of the SCT.
register i
register i
Events
H matches
L matches
register
Conflict
register
Enable
Enable
H STATE
Clear
L STATE
HEVENTi
Set
All information provided in this document is subject to legal disclaimers.
Conflict events
Rev. 00.13 — 20 July 2011
No Change
SETCLRi
register
Flags
MATCHSELi
OUTSELi
IOCONDi
OiRES
outputs
IOSELi
inputs
Chapter 24: LPC18xx State Configurable Timer (SCT)
STATEMASKi
COMBMODEi
select
select
Select
Conflict
register
Flags
select
SCT clock
OUT
reg
NoChangeConflict i
UT interrupt
event i
UM10430
Output i
© NXP B.V. 2011. All rights reserved.
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