LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 453

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
21.6.5.1 Device mode
21.6.5.2 Host mode
21.6.5 Frame index register (FRINDEX)
In Device mode this register is read only, and the device controller updates the
FRINDEX[13:3] register from the frame number indicated by the SOF marker. Whenever a
SOF is received by the USB bus, FRINDEX[13:3] will be checked against the SOF
marker. If FRINDEX[13:3] is different from the SOF marker, FRINDEX[13:3] will be set to
the SOF value and FRINDEX[2:0] will be set to zero (i.e. SOF for 1 ms frame). If
FRINDEX [13:3] is equal to the SOF value, FRINDEX[2:0] will be incremented (i.e. SOF
for 125 s micro-frame) by hardware.
Table 374. USB frame index register in device mode (FRINDEX_D - address 0x4000 714C) bit
This register is used by the host controller to index the periodic frame list. The register
updates every 125 s (once each micro-frame). Bits[N: 3] are used to select a particular
entry in the Periodic Frame List during periodic schedule execution. The number of bits
used for the index depends on the size of the frame list as set by system software in the
Frame List Size field in the USBCMD register.
This register must be written as a DWord. Byte writes produce undefined results. This
register cannot be written unless the Host Controller is in the 'Halted' state as indicated by
the HCHalted bit in the USBSTS register (host mode). A write to this register while the
Run/Stop bit is set to a one produces undefined results. Writes to this register also affect
the SOF value.
Table 375. USB frame index register in host mode (FRINDEX_H - address 0x4000 714C) bit
Table 376. Number of bits used for the frame list index
Bit
2:0
13:3
31:14
Bit
2:0
12:3
31:13
USBCMD
bit 15
0
0
0
0
1
Symbol
FRINDEX2_0
FRINDEX13_3
-
description
description
USBCMD
bit 3
0
0
1
1
0
Symbol
FRINDEX2_0
FRINDEX12_3
-
All information provided in this document is subject to legal disclaimers.
USBCMD
bit 2
0
1
0
1
0
Rev. 00.13 — 20 July 2011
Description
Current micro frame number
Current frame number of the last frame
transmitted
Reserved
Description
Current micro frame number
Frame list current index for
1024 elements.
Reserved
Frame list size
1024 elements (4096 bytes). Default value.
512 elements (2048 bytes)
256 elements (1024 bytes)
128 elements (512 bytes)
64 elements (256 bytes)
Chapter 21: LPC18xx USB1 Host/Device controller
Reset value
-
-
-
Reset value
-
-
-
UM10430
© NXP B.V. 2011. All rights reserved.
Size of
FRINDEX12_3
bit field
12
11
10
9
8
Access
R/W
R/W
Access
RO
RO
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