LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 601
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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Table 511. SCT bidirectional output control register (OUTPUTDIRCTRL - address 0x4000 0054) bit description
<Document ID>
User manual
Bit
5:4
7:6
9:8
11:
10
13:
12
15:
14
17:
16
19:
18
21:
20
23:
22
Symbol
SETCLR2
SETCLR3
SETCLR4
SETCLR5
SETCLR6
SETCLR7
SETCLR8
SETCLR9
SETCLR10
SETCLR11
Value Description
0x0
0x1
0x2
0x0
0x1
0x2
0x0
0x1
0x2
0x0
0x1
0x2
0x0
0x1
0x2
0x0
0x1
0x2
0x0
0x1
0x2
0x0
0x1
0x2
0x0
0x1
0x2
0x0
0x1
0x2
Set/clear operation on output 2. Value 0x3 is reserved. Do not program this value.
Set and clear do not depend on any counter.
Set and clear are reversed when counter L or the unified counter is counting down.
Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.
Set/clear operation on output 3. Value 0x3 is reserved. Do not program this value.
Set and clear do not depend on any counter.
Set and clear are reversed when counter L or the unified counter is counting down.
Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.
Set/clear operation on output 4. Value 0x3 is reserved. Do not program this value.
Set and clear do not depend on any counter.
Set and clear are reversed when counter L or the unified counter is counting down.
Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.
Set/clear operation on output 5. Value 0x3 is reserved. Do not program this value.
Set and clear do not depend on any counter.
Set and clear are reversed when counter L or the unified counter is counting down.
Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.
Set/clear operation on output 6. Value 0x3 is reserved. Do not program this value.
Set and clear do not depend on any counter.
Set and clear are reversed when counter L or the unified counter is counting down.
Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.
Set/clear operation on output 7. Value 0x3 is reserved. Do not program this value.
Set and clear do not depend on any counter.
Set and clear are reversed when counter L or the unified counter is counting down.
Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.
Set/clear operation on output 8. Value 0x3 is reserved. Do not program this value.
Set and clear do not depend on any counter.
Set and clear are reversed when counter L or the unified counter is counting down.
Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.
Set/clear operation on output 9. Value 0x3 is reserved. Do not program this value.
Set and clear do not depend on any counter.
Set and clear are reversed when counter L or the unified counter is counting down.
Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.
Set/clear operation on output 5. Value 0x3 is reserved. Do not program this value.
Set and clear do not depend on any counter.
Set and clear are reversed when counter L or the unified counter is counting down.
Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.
Set/clear operation on output 11. Value 0x3 is reserved. Do not program this value.
Set and clear do not depend on any counter.
Set and clear are reversed when counter L or the unified counter is counting down.
Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 24: LPC18xx State Configurable Timer (SCT)
UM10430
© NXP B.V. 2011. All rights reserved.
601 of 1164
0
0
0
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0
0
0
0
0
Reset
value
0
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