LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1023

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
Table 963. Pin description
<Document ID>
User manual
Symbol
P5_3
P5_4
P5_5
P5_6
P5_7
P6_0
P6_1
P6_2
P6_3
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
T8
P9
P10
T13
R12
M12 I; PU
R15
L13
P15
…continued
Reset
state
[1]
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
Type Description
I/O
I
I/O
-
I/O
O
I/O
-
I/O
O
I/O
-
I/O
O
I/O
-
I/O
O
I/O
-
I/O
O
-
-
I/O
O
I/O
I/O
I/O
O
I/O
I/O
I/O
O
-
O
All information provided in this document is subject to legal disclaimers.
GPIO2[12] — General purpose digital input/output pin.
MCI0 — Motor control PWM channel 0, input.
EXTBUS_D15 — External memory data line 15.
n.c.
GPIO2[13] — General purpose digital input/output pin.
MCOB0 — Motor control PWM channel 0, output B.
EXTBUS_D8 — External memory data line 8.
n.c.
GPIO2[14] — General purpose digital input/output pin.
MCOA1 — Motor control PWM channel 1, output A.
EXTBUS_D9 — External memory data line 9.
n.c.
GPIO2[15] — General purpose digital input/output pin.
MCOB1 — Motor control PWM channel 1, output B.
EXTBUS_D10 — External memory data line 10.
n.c.
GPIO2[7] — General purpose digital input/output pin.
MCOA2 — Motor control PWM channel 2, output A.
EXTBUS_D11 — External memory data line 11.
n.c.
I2S_RX_SCK — Receive Clock. It is driven by the master and received by the
slave. Corresponds to the signal SCK in the I
I2S_RX_MCLK — I2S receive master clock.
n.c.
n.c.
GPIO3[0] — General purpose digital input/output pin.
EXTBUS_DYCS1 — SDRAM chip select 1.
U0_UCLK — Serial clock input/output for USART0 in synchronous mode.
I2S_RX_WS — Receive Word Select. It is driven by the master and received
by the slave. Corresponds to the signal WS in the I
GPIO3[1] — General purpose digital input/output pin.
EXTBUS_CKEOUT1 — SDRAM clock enable 1.
U0_DIR — RS-485/EIA-485 output enable/direction control for USART0.
I2S_RX_SDA — I
the receiver. Corresponds to the signal SD in the I
GPIO3[2] — General purpose digital input/output pin.
USB0_PWR_EN — VBUS drive signal (towards external charge pump or
power management unit); indicates that Vbus must be driven (active high).
n.c.
EXTBUS_CS1 — LOW active Chip Select 1 signal.
Rev. 00.13 — 20 July 2011
2
S Receive data. It is driven by the transmitter and read by
2
S-bus specification .
2
2
S-bus specification .
S-bus specification .
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
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