LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 32
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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NXP Semiconductors
<Document ID>
User manual
Fig 15. Boot process timing
processor status
3.3.6 ISP
VDDREG
RESET
IRC12
GND
In-System programming (ISP) is programming or re-programming the on-chip SRAM
memory, using the boot loader software and the USART0 serial port. This can be done
when the part resides in the end-user board. ISP allows to load data into on-chip SRAM
and execute code from on-chip SRAM. For details, see
ramp up
supply
All information provided in this document is subject to legal disclaimers.
IRC12
starts
valid
threshold
22 µs
Rev. 00.13 — 20 July 2011
IRC12
stable
check boot
selection
t
0.5µs; IRC stability count
a
pins
µs
initialise
t
b
device
boot time
µs
copy image to
Chapter
Chapter 3: LPC18xx Boot ROM
embedded
t
c
µs
SRAM
40.
user code
UM10430
© NXP B.V. 2011. All rights reserved.
32 of 1164
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