LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 3
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
- Current page: 3 of 1164
- Download datasheet (8Mb)
NXP Semiconductors
Revision history
Contact information
For more information, please visit:
For sales office addresses, please send an email to:
<Document ID>
User manual
Rev
0.08
Modifications:
0.07
…continued
Date
<tbd>
<tbd>
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Updated the reference clock for the frequency monitor register
Description of RTC calibration updated
USB0 clock source description added to
USB1 clock source description added to
Boot source bit 3 (pin P2_7) and USB0/1 boot modes added to
Add SRAM control register ETBCFG in CREG block
RTC initialization steps updated
Access of LCD controller to SRAM updated
ADC measurement range corrected
GPDMA, CxCONTROL register: bits TRANSFERSIZE are given in number of transfers
Chapter 4 “LPC18xx Security features”
Pin configuration updated
Flash parts added (see
mapping”.
Chapter 40 “LPC18xx flash programming interface”
Description
Preliminary LPC18xx User manual.
Preliminary LPC18xx User manual.
http://www.nxp.com
All information provided in this document is subject to legal disclaimers.
Chapter 1 “Introductory information”
(Table
Rev. 00.13 — 20 July 2011
(Section
175).
salesaddresses@nxp.com
(Section
(Section
added.
Table
Table
31.2).
(Section 23.7.1.1
38.3).
294.
358.
31.7.1).
added.
(Table
36).
and
and
(Section
Table 7
Chapter 2 “LPC18xx Memory
Section
and
12.6.1).
23.7.1.2).
LPC18xx user manual
Table
UM10430
© NXP B.V. 2011. All rights reserved.
8.
(Table
3 of 1164
214).
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