LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 558

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
23.6.16 Cursor Control register
23.6.17 Cursor Configuration register
The two colors defined for the cursor are mapped onto values from the CRSR_PAL0 and
CRSR_PAL0 registers (see Cursor Palette register descriptions).
The contents of the CRSR_IMG register are described in
Table 470. Cursor Image registers (CRSR_IMG, address 0x4000 8800 (CRSR_IMG0) to
The CRSR_CTRL register provides access to frequently used cursor functions, such as
the display on/off control for the cursor, and the cursor number.
If a 32x32 cursor is selected, one of four 32x32 cursors can be enabled. The images each
occupy one quarter of the image memory, with Cursor0 from location 0, followed by
Cursor1 from address 0x100, Cursor2 from 0x200 and Cursor3 from 0x300. If a 64x64
cursor is selected only one cursor fits in the image buffer, and no selection is possible.
Similar frame synchronization rules apply to the cursor number as apply to the cursor
coordinates. If CrsrFramesync is 1, the displayed cursor image is only changed during the
vertical frame blanking period. If CrsrFrameSync is 0, the cursor image index is changed
immediately, even if the cursor is currently being scanned.
The contents of the CRSR_CTRL register are described in
Table 471. Cursor Control register (CRSR_CTRL, address 0x4000 8C00) bit description
The CRSR_CFG register provides overall configuration information for the hardware
cursor.
Bits
31:0
Bits
0
3:1
5:4
31:6
Function
CRSR_IMG
Function
CrsrOn
-
CRSRNUM1_0
-
0x4000 8BFC (CRSR_IMG1)) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Description
Cursor Image data.
The 256 words of the cursor image registers define the
appearance of either one 64x64 cursor or 4 32x32 cursors.
Description
Cursor enable.
0 = Cursor is not displayed.
1 = Cursor is displayed.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Cursor image number.
If the selected cursor size is 6x64, this field has no effect. If
the selected cursor size is 32x32:
00 = Cursor0.
01 = Cursor1.
10 = Cursor2.
11 = Cursor3.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Table
Table
Chapter 23: LPC18xx LCD
470.
471.
UM10430
© NXP B.V. 2011. All rights reserved.
558 of 1164
Reset
value
0x0
0x0
0x0
0x0
Reset
value
0x0