LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 571

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
23.7.5.1 Cursor operation
23.7.5 Hardware cursor
Table 486. Palette data storage for STN color modes.
For monochrome STN mode, only the red palette field bits [4:1] are used. However, in
STN color mode the green and blue [4:1] are also used. Only 4 bits per color are used,
because the gray scaler only supports 16 different shades per color.
Table 487
mode.
Table 487. Palette data storage for STN monochrome mode.
The hardware cursor is an integral part of the LCD controller. It uses the LCD timing
module to provide an indication of the current scan position coordinate, and intercepts the
pixel stream between the palette logic and the gray scale/output multiplexer.
All cursor programming registers are accessed through the LCD slave interface. This also
provides a read/write port to the cursor image RAM.
The hardware cursor is contained in a dual port RAM. It is programmed by software
through the AHB slave interface. The AHB slave interface also provides access to the
hardware cursor control registers. These registers enable you to modify the cursor
position and perform various other functions.
When enabled, the hardware cursor uses the horizontal and vertical synchronization
signals, along with a pixel clock enable and various display parameters to calculate the
current scan coordinate.
Bit(s)
5
4:1
0
Bit(s)
31
30:27
26
25:22
21
20:17
16
15
14:11
10
9:6
5
4:1
0
Name
(RGB format)
G[0]
R[4:1]
R[0]
shows the bit representation of the palette data for the STN monochrome
All information provided in this document is subject to legal disclaimers.
Name
-
-
-
-
-
Y[3:0]
-
-
-
-
-
-
Y[3:0]
-
Rev. 00.13 — 20 July 2011
Description
(RGB format)
Unused
Red palette data
Unused
Description
Unused
Unused
Unused
Unused
Unused
Intensity data
Unused
Unused
Unused
Unused
Unused
Unused
Intensity data
Unused
Name
(BGR format)
G[0]
B[4:1]
B[0]
Chapter 23: LPC18xx LCD
Description
(BGR format)
Unused
Blue palette data
Unused
UM10430
© NXP B.V. 2011. All rights reserved.
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