LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 57

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
7.4.4 ARM Cortex-M3 memory mapping register
7.4.5 CREG5 control register
7.4.6 DMA muxing register
Table 32.
Table 33.
Table 34.
This register controls which set of peripherals is connected to the DMA controller (see
Table
Table 35.
Bit
1:0
31:2
Bit
11:0
31:12
Bit
4:0
5
6
7
8
31:9
Bit
1:0
195).
Symbol
DMAMUXCH0
Symbol
PMUCON
-
Symbol
M3MAP
Symbol
-
-
M3TAPSEL
-
-
-
Power mode control register (PMUCON, address 0x4004 3008) bit description
Memory mapping register (M3MEMMAP, address 0x4004 3100) bit description
CREG5 control register (CREG5, address 0x4004 3118) bit description
DMA muxing register (DMAMUX, address 0x4004 311C) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Value
0x0
0x1
0x2
0x3
Value
0x0
0x1
0x2
0x3
Description
Reserved.
Reserved.
<tbd>
Reserved.
Reserved.
Reserved.
Description
Reserved
Shadow address when accessing memory at
address 0x0000 0000
Description
Select DMA to peripheral connection for
DMA peripheral 0.
SPIFI
SCT match 2
Reserved
T3 match 1
Description
Controls power mode.
Normal
Low-power
Reserved
Normal
Reserved
Chapter 7: LPC18xx Configuration Registers (CREG)
UM10430
Reset
value
0
-
Reset
value
0x000
0x1040
0000
© NXP B.V. 2011. All rights reserved.
Reset
value
-
0
0
0
0
-
Reset
value
0
Access
-
-
R/W
-
-
-
Access
R/W
-
Access
-
R/W
Access
R/W
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