LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 666

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

27.1 How to read this chapter
27.2 Basic configuration
27.3 Features
<Document ID>
User manual
The QEI is available on all LPC18xx parts.
The QEI is configured as follows:
Table 572. QEI clocking and power control
This Quadrature Encoder Interface (QEI) has the following features:
Clock to the QEI register interface and QEI
peripheral clock.
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UM10430
Chapter 27: LPC18xx Quadrature Encoder Interface (QEI)
Rev. 00.13 — 20 July 2011
See
The QEI is reset by the QEI_RST (reset #39).
The QEI interrupt is connected to slot # 15 in the Event router.
tracks encoder position.
increments/ decrements depending on direction.
programmable for 2X or 4X position counting.
velocity capture using built-in timer.
velocity compare function with less than interrupt.
uses 32-bit registers for position and velocity.
three position compare registers with interrupts.
index counter for revolution counting.
index compare register with interrupts.
can combine index and position interrupts to produce an interrupt for whole and partial
revolution displacement.
digital filter with programmable delays for encoder input signals.
can accept decoded signal inputs (clock and direction).
Table 572
All information provided in this document is subject to legal disclaimers.
for clocking and power control.
Rev. 00.13 — 20 July 2011
Base clock
BASE_M3_CLK
Branch clock
CLK_M3_QEI
© NXP B.V. 2011. All rights reserved.
User manual
Maximum
frequency
150 MHz
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