LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 311

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
Table 242. Raw Interrupt Status Register (RINTSTS, address 0x4000 4044) bit description
Bit
4
5
6
7
8
9
10
11
12
13
14
15
31:16 SDIO_INTERRUPT
Symbol
TXDR
RXDR
RCRC
DCRC
RTO_BAR
DRTO_BDS
HTO
FRUN
HLE
SBE
ACD
EBE
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Description
Transmit FIFO data request. Writes to bits clear status bit.
Value of 1 clears status bit, and value of 0 leaves bit intact.
Bits are logged regardless of interrupt mask status.
Receive FIFO data request. Writes to bits clear status bit.
Value of 1 clears status bit, and value of 0 leaves bit intact.
Bits are logged regardless of interrupt mask status.
Response CRC error. Writes to bits clear status bit. Value
of 1 clears status bit, and value of 0 leaves bit intact. Bits
are logged regardless of interrupt mask status.
Data CRC error. Writes to bits clear status bit. Value of 1
clears status bit, and value of 0 leaves bit intact. Bits are
logged regardless of interrupt mask status.
Response time-out (RTO)/Boot Ack Received (BAR).
Writes to bits clear status bit. Value of 1 clears status bit,
and value of 0 leaves bit intact. Bits are logged regardless
of interrupt mask status.
Data read time-out (DRTO)/Boot Data Start (BDS). Writes
to bits clear status bit. Value of 1 clears status bit, and
value of 0 leaves bit intact. Bits are logged regardless of
interrupt mask status.
Data starvation-by-host time-out (HTO). Writes to bits clear
status bit. Value of 1 clears status bit, and value of 0 leaves
bit intact. Bits are logged regardless of interrupt mask
status./Volt_switch_int
FIFO underrun/overrun error. Writes to bits clear status bit.
Value of 1 clears status bit, and value of 0 leaves bit intact.
Bits are logged regardless of interrupt mask status.
Hardware locked write error. Writes to bits clear status bit.
Value of 1 clears status bit, and value of 0 leaves bit intact.
Bits are logged regardless of interrupt mask status.
Start-bit error. Writes to bits clear status bit. Value of 1
clears status bit, and value of 0 leaves bit intact. Bits are
logged regardless of interrupt mask status.
Auto command done. Writes to bits clear status bit. Value
of 1 clears status bit, and value of 0 leaves bit intact. Bits
are logged regardless of interrupt mask status.
End-bit error (read)/write no CRC. Writes to bits clear
status bit. Value of 1 clears status bit, and value of 0 leaves
bit intact. Bits are logged regardless of interrupt mask
status.
Interrupt from SDIO card; one bit for each card. Bit[31]
corresponds to Card[15], and bit[16] is for Card[0]. Writes
to these bits clear them. Value of 1 clears bit and 0 leaves
bit intact.
0 - No SDIO interrupt from card
1 - SDIO interrupt from card In MMC-Ver3.3-only mode,
bits always 0. Bits are logged regardless of interrupt-mask
status.
Chapter 18: LPC18xx SD/MMC interface
UM10430
© NXP B.V. 2011. All rights reserved.
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Reset
value
0
0
0
0
0
0
0
0
0
0
0
0
0