LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 1089

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
42.10.6.1.6 CAN test register
42.10.6.1.7 CAN baud rate prescaler extension register
Write access to the Test Register is enabled by setting bit Test in the CAN Control
Register.
The different test functions may be combined, but when TX[1:0]  “00” is selected, the
message transfer is disturbed.
Table 1021.CAN test register (TEST, address 0x400E 2014) bit description
Table 1022.CAN baud rate prescaler extension register (BRPE, address 0x400E 2018) bit
Bit
1:0
2
3
4
6:5
7
31:8
Bit
3:0
31:4
Symbol
-
BASIC
SILENT
LBACK
TX1_0
RX
-
Symbol
BRPE
-
description
All information provided in this document is subject to legal disclaimers.
Value
-
1
0
1
0
1
0
0x0
0x1
0x2
0x3
1
0
Rev. 00.13 — 20 July 2011
Description
Basic mode
IF1 registers used as TX buffer, IF2 registers
used as RX buffer.
Basic mode disabled.
Silent mode
The module is in silent mode.
Normal operation.
Loop back mode
Loop back mode is enabled.
Loop back mode is disabled.
Control of TD pins
Level at the TD pin is controlled by the CAN
controller. This is the value at reset.
The sample point can be monitored at the TD
pin.
TD pin is driven LOW/dominant.
TD pin is driven HIGH/recessive.
Monitors the actual value of the RD Pin
The CAN bus is recessive (RD = 1).
The CAN bus is dominant (RD = 0).
Reserved
Description
Baud rate prescaler extension
By programming BRPE the Baud Rate Prescaler
can be extended to values up to 1023. Hardware
interprets the value as the value of BRPE (MSBs)
and BRP (LSBs) plus one.
Allowed values are 0x00 to 0x0F
Reserved
Chapter 42: Appendix
Reset
value
0
0
00
0
0
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0x0000 R/W
-
1089 of 1164
Access
-
R/W
R/W
R/W
R/W
R
-
Access
-