LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 985
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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42.4.6.2 Crystal oscillator control register
Table 931. FREQ_MON register (FREQ_MON, address 0x4005 0014) bit description
The register XTAL_OSC_CONTROL contains the control bits for the crystal oscillator.
Table 932. XTAL_OSC_CTRL register (XTAL_OSC_CTRL, address 0x4005 0018) bit
Bit
27:24
31:28
Bit
0
1
2
31:3
Symbol
ENABLE
BYPASS
HF
-
Symbol
CLK_SEL
-
description
…continued
All information provided in this document is subject to legal disclaimers.
Value Description
0
1
0
1
0
1
Value
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
Rev. 00.13 — 20 July 2011
Configure crystal operation or external-clock input
Oscillator pad enable
Enable
Power-down (default)
pin XTAL1
Operation with crystal connected (default).
Bypass mode. Use this mode when an external
clock source is used instead of a crystal.
Select frequency range. Between 15 MHz to 20
MHz, the value of this bit is don’t care.
Oscillator low-frequency mode (crystal or external
clock source 1 to 20 MHz)
Oscillator high-frequency mode; crystal or external
clock source 15 to 25 MHz (default)
Reserved
Description
Clock-source selection for the clock to be
measured.
32 kHz oscillator (default)
ENET_RX_CLK
ENET_TX_CLK
GP_CLKIN
Reserved
Crystal oscillator
PLL0
PLL1
Reserved
Reserved
IDIVA
IDIVB
IDIVC
IDIVD
IDIVE
Reserved
IRC
[1]
.
[1]
Chapter 42: Appendix
UM10430
Reset
value
0
-
© NXP B.V. 2011. All rights reserved.
Reset
value
1
0
1
-
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Access
R/W
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