LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 115

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
11.4 Register overview
Table 91.
<Document ID>
User manual
Name
RESET_CTRL0
RESET_CTRL1
RESET_STATUS0
RESET_STATUS1
RESET_STATUS2
RESET_STATUS3
RESET_ACTIVE_STATUS0 R
RESET_ACTIVE_STATUS1 R
RESET_EXT_STAT0
RESET_EXT_STAT1
RESET_EXT_STAT2
RESET_EXT_STAT3
RESET_EXT_STAT4
RESET_EXT_STAT5
RESET_EXT_STAT6
RESET_EXT_STAT7
RESET_EXT_STAT8
RESET_EXT_STAT9
RESET_EXT_STAT10
RESET_EXT_STAT11
RESET_EXT_STAT12
RESET_EXT_STAT13
RESET_EXT_STAT14
RESET_EXT_STAT15
RESET_EXT_STAT16
RESET_EXT_STAT17
RESET_EXT_STAT18
RESET_EXT_STAT19
Register overview: RGU (base address: 0x4005 3000)
Access
-
-
W
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
R/W
R/W
R/W
R/W
-
-
-
R/W
-
-
R/W
R/W
R/W
R/W
Address
offset
0x100
0x104
0x110
0x114
0x118
0x11C
0x150
0x154
0x400
0x404
0x408
0x40C
0x410
0x414
0x418
0x41C
0x420
0x424
0x428
0x42C
0x430
0x434
0x438
0x43C
0x440
0x444
0x448
0x44C
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Description
Reset control register 0
Reset control register 1
Reset status register 0
Reset status register 1
Reset status register 2
Reset status register 3
Reset active status register 0
Reset active status register 1
Reset external status register 0 for
CORE_RST
Reset external status register 1 for
PERIPH_RST
Reset external status register 2 for
MASTER_RST
Reserved
Reset external status register 4 for
WWDT_RST
Reset external status register 5 for
CREG_RST
Reserved
Reserved
Reset external status register 8 for
BUS_RST
Reset external status register 9 for
SCU_RST
Reserved
Reserved
Reserved
Reset external status register 13 for
M3_RST
Reserved
Reserved
Reset external status register 16 for
LCD_RST
Reset external status register 17 for
USB0_RST
Reset external status register 18 for
USB1_RST
Reset external status register 19 for
DMA_RST
Chapter 11: LPC18xx Reset Generation Unit (RGU)
Reset value Reference
-
-
0x5555 0050 see
0x5555 5555 see
0x5555 5555 see
0x5555 5555 see
0x0
0x0
0x0
0x0
0x0
-
0x0
0x0
-
-
0x0
0x0
-
-
-
0x0
-
-
0x0
0x0
0x0
0x0
UM10430
© NXP B.V. 2011. All rights reserved.
see
see
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see
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-
see
see
-
-
-
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-
-
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Table 92
Table 93
Table 94
Table 95
Table 96
Table 97
Table 98
Table 99
Table 100
Table 101
Table 102
Table 103
Table 104
Table 105
Table 105
Table 106
Table 106
Table 106
Table 106
Table 106
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