LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 940

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
42.1.7 Vector table remapping
Table 885. Connection of interrupt sources to the NVIC
The Cortex-M3 incorporates a mechanism that allows remapping the interrupt vector table
to alternate locations in the memory map. This is controlled via the Vector Table Offset
Register (VTOR) contained in the Cortex-M3.
The vector table may be located anywhere within the bottom 1 GB of Cortex-M3 address
space. The vector table should be located on a 256 word (1024 byte) boundary. Refer to
the Cortex-M3 User Guide for details of the Vector Table Offset feature.
ARM describes bit 29 of the VTOR (TBLOFF) as selecting a memory region, either code
or SRAM. For simplicity, this bit can be thought as simply part of the address offset since
the split between the “code” space and the “SRAM” space occurs at the location
corresponding to bit 29 in a memory address.
Examples:
To place the vector table at the beginning of the “local” static RAM, starting at address
0x1000 0000, place the value 0x1000 0000 in the VTOR register. This indicates address
0x1000 0000 in the code space, since bit 29 of the VTOR equals 0.
To place the vector table at the beginning of the AHB static RAM, starting at address
0x2007 C000, place the value 0x2007 C000 in the VTOR register. This indicates address
0x2007 C000 in the SRAM space, since bit 29 of the VTOR equals 1.
Interrupt
ID
29
30
31
32 - 40
Exception
Number
45
46
47
48 - 56
All information provided in this document is subject to legal disclaimers.
Vector
Offset
0xB4
0xB8
0xBC
0xC0 -
0Xe0
Rev. 00.13 — 20 July 2011
Function
AES
SPIFI
-
-
Flag(s)
Reserved
Reserved
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
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