LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 919
LPC1837FET256,551
Manufacturer Part Number
LPC1837FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1837FET256,551
Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Details
Other names
935293795551
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User manual
40.8.5 Read Memory <address> <no. of bytes>
The ISP command handler compares it with the check-sum of the received bytes. If the
check-sum matches, the ISP command handler responds with "OK<CR><LF>" to
continue further transmission. If the check-sum does not match, the ISP command
handler responds with "RESEND<CR><LF>". In response the host should retransmit the
bytes.
Table 848. ISP Write to RAM command
The data stream is followed by the command success return code. The check-sum is sent
after transmitting 20 UU-encoded lines. The checksum is generated by adding raw data
(before UU-encoding) bytes and is reset after transmitting 20 UU-encoded lines. The
length of any UU-encoded line should not exceed 61 characters (bytes) i.e. it can hold
45 data bytes. When the data fits in less than 20 UU-encoded lines then the check-sum is
of actual number of bytes sent. The host should compare it with the checksum of the
received bytes. If the check-sum matches then the host should respond with
"OK<CR><LF>" to continue further transmission. If the check-sum does not match then
the host should respond with "RESEND<CR><LF>". In response the ISP command
handler sends the data again.
Table 849. ISP Read Memory command
Command
Input
Return Code
Description
Example
Command
Input
Return Code
Description
Example
W
Start Address: RAM address where data bytes are to be written. This address
should be a word boundary.
Number of Bytes: Number of bytes to be written. Count should be a multiple of 4
CMD_SUCCESS |
ADDR_ERROR (Address not on word boundary) |
ADDR_NOT_MAPPED |
COUNT_ERROR (Byte count is not multiple of 4) |
PARAM_ERROR |
CODE_READ_PROTECTION_ENABLED
This command is used to download data to RAM. Data should be in UU-encoded
format. This command is blocked when code read protection levels CRP2 or
CRP3 are enabled.
"W 268435968 4<CR><LF>" writes 4 bytes of data to address 0x1000 0200.
R
Start Address: Address from where data bytes are to be read. This address
should be a word boundary.
Number of Bytes: Number of bytes to be read. Count should be a multiple of 4.
CMD_SUCCESS followed by <actual data (UU-encoded)> |
ADDR_ERROR (Address not on word boundary) |
ADDR_NOT_MAPPED |
COUNT_ERROR (Byte count is not a multiple of 4) |
PARAM_ERROR |
CODE_READ_PROTECTION_ENABLED
This command is used to read data from RAM or flash memory. This command is
blocked when any level of code read protection is enabled.
"R 268435968 4<CR><LF>" reads 4 bytes of data from address 0x1000 0200.
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 40: LPC18xx flash programming interface
UM10430
© NXP B.V. 2011. All rights reserved.
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