LPC1837FET256,551 NXP Semiconductors, LPC1837FET256,551 Datasheet - Page 999

• Manufacturer Part Number: LPC1837FET256,551
• Description: Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1837FET256,551

• Core: ARM Cortex M3
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / Rohs Status: Details
• Other names: 935293795551

NXP Semiconductors
<Document ID>
User manual
To get at the output of the PLL (clkout) the best phase-noise and jitter performance, the
highest possible reference clock (clkref) at the PFD has to be used. Therefore mode 1a
and 1b are recommended, when it is possible to make the right output frequency without
pre-divider.
By using the post-divider the clock at the output of the PLL (clkout) the divider ratio is
always even because the divide-by-2 divider after the post-divider.
Table 949. DIRECTL and DIRECTO bit settings in HP0/1_Mode register
Mode 1a: Normal operating mode without post-divider and without pre-divider:
normal operating mode 1a the post-divider and pre-divider are bypassed. The operating
frequencies are:
Fout = Fcco = 2 x M x Fin  (275 MHz  Fcco  550 MHz, 4 kHz  Fin  150 MHz)
The feedback divider ratio is programmable:
Mode 1b: Normal operating mode with post-divider and without pre-divider:
normal operating mode 1b the pre-divider is bypassed. The operating frequencies are:
Fout = Fcco /(2 x P) = (M / P) x Fin  (275 MHz  Fcco  550 MHz, 4 kHz  Fin  150 MHz)
The divider ratios are programmable:
Mode 1c: Normal operating mode without post-divider and with pre-divider:
normal operating mode 1c the post-divider with divide-by-2 divider is bypassed. The
operating frequencies are:
Fout = Fcco = 2 x M x Fin / N  (275 MHz  Fcco  550 MHz, 4 kHz  Fin/N  150 MHz)
The divider ratios are programmable:
Mode 1d: Normal operating mode with post-divider and with pre-divider:
operating mode 1d none of the dividers are bypassed. The operating frequencies are:
Fout = Fcco /(2 x P) = M x Fin /(N x P)  (275 MHz  Fcco  550 MHz, 4 kHz  Fin/N  150
MHz)
The divider ratios are programmable:
Mode
1a
1b
1c
1d
•
•
•
•
•
•
Feedback-divider M (M, 1 to 2
Feedback-divider M (M, 1 to 2
Post-divider P (P, 1 to 32)
Pre-divider N (N, 1 to 256)
Feedback-divider M (M, 1 to 2
Pre-divider N (N, 1 to 256)
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
DIRECTI
1
1
0
0
15
15
15
)
)
)
DIRECTO
1
0
1
0
Chapter 42: Appendix
UM10430
© NXP B.V. 2011. All rights reserved.
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